Korean Institute of Surface Engineering

pISSN : 1225-8024 | eISSN : 3399-8403


공학

한국표면공학회지 (47권2호 68-74)

A Study on the Seed Step-coverage Enhancement Process (SSEP) of High Aspect Ratio Through Silicon Via (TSV) Using Pd/Cu/PVP Colloids

Pd/Cu/PVP 콜로이드를 이용한 고종횡비 실리콘 관통전극 내 구리씨앗층의 단차피복도 개선에 관한 연구

이동열;이유진;김현종;이민형;
Lee, Dongryul;Lee, Yugin;Kim, Hyung-Jong;Lee, Min Hyung;

한국생산기술연구원 표면처리연구실용화그룹;
Surface Technology R&BD Group, Korea Institute of Industrial Technology;

DOI : 10.5695/JKISE.2014.47.2.068

Abstract

The seed step-coverage enhancement process (SSEP) using Pd/Cu/PVP colloids was investigated for the filling of through silicon via (TSV) without void. TEM analysis showed that the Pd/Cu nano-particles were well dispersed in aqueous solution with the average diameter of 6.18 nm. This Pd/Cu nano-particles were uniformly deposited on the substrate of Si/$SiO_2$/Ti wafer using electrophoresis with the high frequency Alternating Current (AC). After electroless Cu deposition on the substrate treated with Pd/Cu/PVP colloids, the adhesive property between deposited Cu layer and substrate was evaluated. The Cu deposit obtained by SSEP with Pd/Cu/PVP colloids showed superior adhesion property to that on Pd ion catalyst-treated substrate. Finally, by implementing the SSEP using Pd/Cu/PVP colloids, we achieved 700% improvement of step coverage of Cu seed layer compared to PVD process, resulting in void-free filling in high aspect ratio TSV.

Keywords

Seed step-coverage enhancement process (SSEP);Pd/Cu/PVP colloids;Through silicon via (TSV);Electrophoresis;